[connect24h:5360] Re: パケットロスをしにくいLANカード

[Masahiko KIMOTO <kimoto@xxxxxxxxxxx>]

 > Realtek等の安物NICは、3Com Intel Decの特許を回避するため、
 > まともな実装になっていないので避けた方がいいです。
 > 3ComかIntelのNICなら大丈夫でしょう。

佐々木(で)さんほどちゃんとした裏付があるわけではありませんが、
経験上VIAのNICはFreeBSDだと結構つっかえます。

あと、FreeBSDのRealtekのドライバにはこんなことが書いてあります。

/*
 * The RealTek 8139 PCI NIC redefines the meaning of 'low end.' This is
 * probably the worst PCI ethernet controller ever made, with the possible
 * exception of the FEAST chip made by SMC. The 8139 supports bus-master
 * DMA, but it has a terrible interface that nullifies any performance
 * gains that bus-master DMA usually offers.
 *
 * For transmission, the chip offers a series of four TX descriptor
 * registers. Each transmit frame must be in a contiguous buffer, aligned
 * on a longword (32-bit) boundary. This means we almost always have to
 * do mbuf copies in order to transmit a frame, except in the unlikely
 * case where a) the packet fits into a single mbuf, and b) the packet
 * is 32-bit aligned within the mbuf's data area. The presence of only
 * four descriptor registers means that we can never have more than four
 * packets queued for transmission at any one time.
 *
 * Reception is not much better. The driver has to allocate a single large
 * buffer area (up to 64K in size) into which the chip will DMA received
 * frames. Because we don't know where within this region received packets
 * will begin or end, we have no choice but to copy data from the buffer
 * area into mbufs in order to pass the packets up to the higher protocol
 * levels.
 *
 * It's impossible given this rotten design to really achieve decent
 * performance at 100Mbps, unless you happen to have a 400Mhz PII or
 * some equally overmuscled CPU to drive it.
 *
 * On the bright side, the 8139 does have a built-in PHY, although
 * rather than using an MDIO serial interface like most other NICs, the
 * PHY registers are directly accessible through the 8139's register
 * space. The 8139 supports autonegotiation, as well as a 64-bit multicast
 * filter.
 *
 * The 8129 chip is an older version of the 8139 that uses an external PHY
 * chip. The 8129 has a serial MDIO interface for accessing the MII where
 * the 8139 lets you directly access the on-board PHY registers. We need
 * to select which interface to use depending on the chip type.
 */

----------------------------------------------------------------------
  東京工業大学大学院 情報理工学研究科 数理・計算科学専攻 研究生
    木本 雅彦 <kimoto@xxxxxxxxxxx> :  http://www.ohnolab.org/~kimoto
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